Fix missing PWM clock wire

This commit is contained in:
Madeline Busig 2025-12-03 02:17:57 -08:00
parent 8a7ed7a61b
commit 1f1fe1dff0

View File

@ -409,10 +409,13 @@
wire [3:0] pwm_clk_mod = slv_reg3[11:8];
wire pwm_oen = slv_reg3[0];
wire pwm_clk;
wire pwm_clk_en;
assign pwm_clk = S_AXI_ACLK;
clk_enable_pulser clkdiv_pulser (
.clk(S_AXI_ACLK),
.clk(pwm_clk),
.rst(rst),
.sel(pwm_clk_mod),
.en_out(pwm_clk_en)