From 1f1fe1dff089dd89cef3165c6466b3a1c2c10884 Mon Sep 17 00:00:00 2001 From: Madeline Busig Date: Wed, 3 Dec 2025 02:17:57 -0800 Subject: [PATCH] Fix missing PWM clock wire --- pwm_block/src/rgb_pwm_block_S_AXI.v | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/pwm_block/src/rgb_pwm_block_S_AXI.v b/pwm_block/src/rgb_pwm_block_S_AXI.v index 8bf4c3e..ddbd9d8 100644 --- a/pwm_block/src/rgb_pwm_block_S_AXI.v +++ b/pwm_block/src/rgb_pwm_block_S_AXI.v @@ -409,10 +409,13 @@ wire [3:0] pwm_clk_mod = slv_reg3[11:8]; wire pwm_oen = slv_reg3[0]; + wire pwm_clk; wire pwm_clk_en; + assign pwm_clk = S_AXI_ACLK; + clk_enable_pulser clkdiv_pulser ( - .clk(S_AXI_ACLK), + .clk(pwm_clk), .rst(rst), .sel(pwm_clk_mod), .en_out(pwm_clk_en)