{
  "design": {
    "design_info": {
      "boundary_crc": "0x74C93F5E1FD3DD76",
      "device": "xc7z007sclg400-1",
      "name": "pwm_controller",
      "rev_ctrl_bd_flag": "RevCtrlBdOff",
      "synth_flow_mode": "Hierarchical",
      "tool_version": "2022.1",
      "validated": "true"
    },
    "design_tree": {
      "processing_system7_0": "",
      "ps7_0_axi_periph": {
        "s00_couplers": {
          "auto_pc": ""
        }
      },
      "rst_ps7_0_50M": "",
      "rgb_pwm_block_0": ""
    },
    "interface_ports": {
      "DDR": {
        "mode": "Master",
        "vlnv_bus_definition": "xilinx.com:interface:ddrx:1.0",
        "vlnv": "xilinx.com:interface:ddrx_rtl:1.0",
        "parameters": {
          "AXI_ARBITRATION_SCHEME": {
            "value": "TDM",
            "value_src": "default"
          },
          "BURST_LENGTH": {
            "value": "8",
            "value_src": "default"
          },
          "CAN_DEBUG": {
            "value": "false",
            "value_src": "default"
          },
          "CAS_LATENCY": {
            "value": "11",
            "value_src": "default"
          },
          "CAS_WRITE_LATENCY": {
            "value": "11",
            "value_src": "default"
          },
          "CS_ENABLED": {
            "value": "true",
            "value_src": "default"
          },
          "DATA_MASK_ENABLED": {
            "value": "true",
            "value_src": "default"
          },
          "DATA_WIDTH": {
            "value": "8",
            "value_src": "default"
          },
          "MEMORY_TYPE": {
            "value": "COMPONENTS",
            "value_src": "default"
          },
          "MEM_ADDR_MAP": {
            "value": "ROW_COLUMN_BANK",
            "value_src": "default"
          },
          "SLOT": {
            "value": "Single",
            "value_src": "default"
          },
          "TIMEPERIOD_PS": {
            "value": "1250",
            "value_src": "default"
          }
        }
      },
      "FIXED_IO": {
        "mode": "Master",
        "vlnv_bus_definition": "xilinx.com:display_processing_system7:fixedio:1.0",
        "vlnv": "xilinx.com:display_processing_system7:fixedio_rtl:1.0",
        "parameters": {
          "CAN_DEBUG": {
            "value": "false",
            "value_src": "default"
          }
        }
      }
    },
    "ports": {
      "RGB_led_A": {
        "direction": "O",
        "left": "2",
        "right": "0"
      }
    },
    "components": {
      "processing_system7_0": {
        "vlnv": "xilinx.com:ip:processing_system7:5.5",
        "xci_name": "pwm_controller_processing_system7_0_0",
        "xci_path": "ip/pwm_controller_processing_system7_0_0/pwm_controller_processing_system7_0_0.xci",
        "inst_hier_path": "processing_system7_0",
        "parameters": {
          "PCW_ACT_APU_PERIPHERAL_FREQMHZ": {
            "value": "666.666687"
          },
          "PCW_ACT_CAN_PERIPHERAL_FREQMHZ": {
            "value": "10.000000"
          },
          "PCW_ACT_DCI_PERIPHERAL_FREQMHZ": {
            "value": "10.158730"
          },
          "PCW_ACT_ENET0_PERIPHERAL_FREQMHZ": {
            "value": "10.000000"
          },
          "PCW_ACT_ENET1_PERIPHERAL_FREQMHZ": {
            "value": "10.000000"
          },
          "PCW_ACT_FPGA0_PERIPHERAL_FREQMHZ": {
            "value": "50.000000"
          },
          "PCW_ACT_FPGA1_PERIPHERAL_FREQMHZ": {
            "value": "10.000000"
          },
          "PCW_ACT_FPGA2_PERIPHERAL_FREQMHZ": {
            "value": "10.000000"
          },
          "PCW_ACT_FPGA3_PERIPHERAL_FREQMHZ": {
            "value": "10.000000"
          },
          "PCW_ACT_PCAP_PERIPHERAL_FREQMHZ": {
            "value": "200.000000"
          },
          "PCW_ACT_QSPI_PERIPHERAL_FREQMHZ": {
            "value": "200.000000"
          },
          "PCW_ACT_SDIO_PERIPHERAL_FREQMHZ": {
            "value": "100.000000"
          },
          "PCW_ACT_SMC_PERIPHERAL_FREQMHZ": {
            "value": "10.000000"
          },
          "PCW_ACT_SPI_PERIPHERAL_FREQMHZ": {
            "value": "166.666672"
          },
          "PCW_ACT_TPIU_PERIPHERAL_FREQMHZ": {
            "value": "200.000000"
          },
          "PCW_ACT_TTC0_CLK0_PERIPHERAL_FREQMHZ": {
            "value": "111.111115"
          },
          "PCW_ACT_TTC0_CLK1_PERIPHERAL_FREQMHZ": {
            "value": "111.111115"
          },
          "PCW_ACT_TTC0_CLK2_PERIPHERAL_FREQMHZ": {
            "value": "111.111115"
          },
          "PCW_ACT_TTC1_CLK0_PERIPHERAL_FREQMHZ": {
            "value": "111.111115"
          },
          "PCW_ACT_TTC1_CLK1_PERIPHERAL_FREQMHZ": {
            "value": "111.111115"
          },
          "PCW_ACT_TTC1_CLK2_PERIPHERAL_FREQMHZ": {
            "value": "111.111115"
          },
          "PCW_ACT_UART_PERIPHERAL_FREQMHZ": {
            "value": "100.000000"
          },
          "PCW_ACT_WDT_PERIPHERAL_FREQMHZ": {
            "value": "111.111115"
          },
          "PCW_CLK0_FREQ": {
            "value": "50000000"
          },
          "PCW_CLK1_FREQ": {
            "value": "10000000"
          },
          "PCW_CLK2_FREQ": {
            "value": "10000000"
          },
          "PCW_CLK3_FREQ": {
            "value": "10000000"
          },
          "PCW_DDR_RAM_HIGHADDR": {
            "value": "0x1FFFFFFF"
          },
          "PCW_EN_EMIO_SPI1": {
            "value": "0"
          },
          "PCW_EN_EMIO_UART0": {
            "value": "0"
          },
          "PCW_EN_GPIO": {
            "value": "1"
          },
          "PCW_EN_QSPI": {
            "value": "1"
          },
          "PCW_EN_SDIO0": {
            "value": "1"
          },
          "PCW_EN_SPI1": {
            "value": "1"
          },
          "PCW_EN_UART0": {
            "value": "1"
          },
          "PCW_EN_UART1": {
            "value": "0"
          },
          "PCW_EN_USB0": {
            "value": "1"
          },
          "PCW_FPGA0_PERIPHERAL_FREQMHZ": {
            "value": "50"
          },
          "PCW_FPGA_FCLK0_ENABLE": {
            "value": "1"
          },
          "PCW_GPIO_MIO_GPIO_ENABLE": {
            "value": "1"
          },
          "PCW_GPIO_MIO_GPIO_IO": {
            "value": "MIO"
          },
          "PCW_I2C_RESET_ENABLE": {
            "value": "1"
          },
          "PCW_IMPORT_BOARD_PRESET": {
            "value": "/home/kilo/.local/share/blackboard/blackboard_ps_preset.tcl"
          },
          "PCW_MIO_0_IOTYPE": {
            "value": "LVCMOS 3.3V"
          },
          "PCW_MIO_0_PULLUP": {
            "value": "enabled"
          },
          "PCW_MIO_0_SLEW": {
            "value": "slow"
          },
          "PCW_MIO_10_IOTYPE": {
            "value": "LVCMOS 3.3V"
          },
          "PCW_MIO_10_PULLUP": {
            "value": "enabled"
          },
          "PCW_MIO_10_SLEW": {
            "value": "slow"
          },
          "PCW_MIO_11_IOTYPE": {
            "value": "LVCMOS 3.3V"
          },
          "PCW_MIO_11_PULLUP": {
            "value": "enabled"
          },
          "PCW_MIO_11_SLEW": {
            "value": "slow"
          },
          "PCW_MIO_12_IOTYPE": {
            "value": "LVCMOS 3.3V"
          },
          "PCW_MIO_12_PULLUP": {
            "value": "enabled"
          },
          "PCW_MIO_12_SLEW": {
            "value": "slow"
          },
          "PCW_MIO_13_IOTYPE": {
            "value": "LVCMOS 3.3V"
          },
          "PCW_MIO_13_PULLUP": {
            "value": "enabled"
          },
          "PCW_MIO_13_SLEW": {
            "value": "slow"
          },
          "PCW_MIO_14_IOTYPE": {
            "value": "LVCMOS 3.3V"
          },
          "PCW_MIO_14_PULLUP": {
            "value": "enabled"
          },
          "PCW_MIO_14_SLEW": {
            "value": "slow"
          },
          "PCW_MIO_15_IOTYPE": {
            "value": "LVCMOS 3.3V"
          },
          "PCW_MIO_15_PULLUP": {
            "value": "enabled"
          },
          "PCW_MIO_15_SLEW": {
            "value": "slow"
          },
          "PCW_MIO_16_IOTYPE": {
            "value": "LVCMOS 3.3V"
          },
          "PCW_MIO_16_PULLUP": {
            "value": "enabled"
          },
          "PCW_MIO_16_SLEW": {
            "value": "slow"
          },
          "PCW_MIO_17_IOTYPE": {
            "value": "LVCMOS 3.3V"
          },
          "PCW_MIO_17_PULLUP": {
            "value": "enabled"
          },
          "PCW_MIO_17_SLEW": {
            "value": "slow"
          },
          "PCW_MIO_18_IOTYPE": {
            "value": "LVCMOS 3.3V"
          },
          "PCW_MIO_18_PULLUP": {
            "value": "enabled"
          },
          "PCW_MIO_18_SLEW": {
            "value": "slow"
          },
          "PCW_MIO_19_IOTYPE": {
            "value": "LVCMOS 3.3V"
          },
          "PCW_MIO_19_PULLUP": {
            "value": "enabled"
          },
          "PCW_MIO_19_SLEW": {
            "value": "slow"
          },
          "PCW_MIO_1_IOTYPE": {
            "value": "LVCMOS 3.3V"
          },
          "PCW_MIO_1_PULLUP": {
            "value": "enabled"
          },
          "PCW_MIO_1_SLEW": {
            "value": "slow"
          },
          "PCW_MIO_20_IOTYPE": {
            "value": "LVCMOS 3.3V"
          },
          "PCW_MIO_20_PULLUP": {
            "value": "enabled"
          },
          "PCW_MIO_20_SLEW": {
            "value": "slow"
          },
          "PCW_MIO_21_IOTYPE": {
            "value": "LVCMOS 3.3V"
          },
          "PCW_MIO_21_PULLUP": {
            "value": "enabled"
          },
          "PCW_MIO_21_SLEW": {
            "value": "slow"
          },
          "PCW_MIO_22_IOTYPE": {
            "value": "LVCMOS 3.3V"
          },
          "PCW_MIO_22_PULLUP": {
            "value": "enabled"
          },
          "PCW_MIO_22_SLEW": {
            "value": "slow"
          },
          "PCW_MIO_23_IOTYPE": {
            "value": "LVCMOS 3.3V"
          },
          "PCW_MIO_23_PULLUP": {
            "value": "enabled"
          },
          "PCW_MIO_23_SLEW": {
            "value": "slow"
          },
          "PCW_MIO_24_IOTYPE": {
            "value": "LVCMOS 3.3V"
          },
          "PCW_MIO_24_PULLUP": {
            "value": "enabled"
          },
          "PCW_MIO_24_SLEW": {
            "value": "slow"
          },
          "PCW_MIO_25_IOTYPE": {
            "value": "LVCMOS 3.3V"
          },
          "PCW_MIO_25_PULLUP": {
            "value": "enabled"
          },
          "PCW_MIO_25_SLEW": {
            "value": "slow"
          },
          "PCW_MIO_26_IOTYPE": {
            "value": "LVCMOS 3.3V"
          },
          "PCW_MIO_26_PULLUP": {
            "value": "enabled"
          },
          "PCW_MIO_26_SLEW": {
            "value": "slow"
          },
          "PCW_MIO_27_IOTYPE": {
            "value": "LVCMOS 3.3V"
          },
          "PCW_MIO_27_PULLUP": {
            "value": "enabled"
          },
          "PCW_MIO_27_SLEW": {
            "value": "slow"
          },
          "PCW_MIO_28_IOTYPE": {
            "value": "LVCMOS 3.3V"
          },
          "PCW_MIO_28_PULLUP": {
            "value": "enabled"
          },
          "PCW_MIO_28_SLEW": {
            "value": "slow"
          },
          "PCW_MIO_29_IOTYPE": {
            "value": "LVCMOS 3.3V"
          },
          "PCW_MIO_29_PULLUP": {
            "value": "enabled"
          },
          "PCW_MIO_29_SLEW": {
            "value": "slow"
          },
          "PCW_MIO_2_IOTYPE": {
            "value": "LVCMOS 3.3V"
          },
          "PCW_MIO_2_SLEW": {
            "value": "slow"
          },
          "PCW_MIO_30_IOTYPE": {
            "value": "LVCMOS 3.3V"
          },
          "PCW_MIO_30_PULLUP": {
            "value": "enabled"
          },
          "PCW_MIO_30_SLEW": {
            "value": "slow"
          },
          "PCW_MIO_31_IOTYPE": {
            "value": "LVCMOS 3.3V"
          },
          "PCW_MIO_31_PULLUP": {
            "value": "enabled"
          },
          "PCW_MIO_31_SLEW": {
            "value": "slow"
          },
          "PCW_MIO_32_IOTYPE": {
            "value": "LVCMOS 3.3V"
          },
          "PCW_MIO_32_PULLUP": {
            "value": "enabled"
          },
          "PCW_MIO_32_SLEW": {
            "value": "slow"
          },
          "PCW_MIO_33_IOTYPE": {
            "value": "LVCMOS 3.3V"
          },
          "PCW_MIO_33_PULLUP": {
            "value": "enabled"
          },
          "PCW_MIO_33_SLEW": {
            "value": "slow"
          },
          "PCW_MIO_34_IOTYPE": {
            "value": "LVCMOS 3.3V"
          },
          "PCW_MIO_34_PULLUP": {
            "value": "enabled"
          },
          "PCW_MIO_34_SLEW": {
            "value": "slow"
          },
          "PCW_MIO_35_IOTYPE": {
            "value": "LVCMOS 3.3V"
          },
          "PCW_MIO_35_PULLUP": {
            "value": "enabled"
          },
          "PCW_MIO_35_SLEW": {
            "value": "slow"
          },
          "PCW_MIO_36_IOTYPE": {
            "value": "LVCMOS 3.3V"
          },
          "PCW_MIO_36_PULLUP": {
            "value": "enabled"
          },
          "PCW_MIO_36_SLEW": {
            "value": "slow"
          },
          "PCW_MIO_37_IOTYPE": {
            "value": "LVCMOS 3.3V"
          },
          "PCW_MIO_37_PULLUP": {
            "value": "enabled"
          },
          "PCW_MIO_37_SLEW": {
            "value": "slow"
          },
          "PCW_MIO_38_IOTYPE": {
            "value": "LVCMOS 3.3V"
          },
          "PCW_MIO_38_PULLUP": {
            "value": "enabled"
          },
          "PCW_MIO_38_SLEW": {
            "value": "slow"
          },
          "PCW_MIO_39_IOTYPE": {
            "value": "LVCMOS 3.3V"
          },
          "PCW_MIO_39_PULLUP": {
            "value": "enabled"
          },
          "PCW_MIO_39_SLEW": {
            "value": "slow"
          },
          "PCW_MIO_3_IOTYPE": {
            "value": "LVCMOS 3.3V"
          },
          "PCW_MIO_3_SLEW": {
            "value": "slow"
          },
          "PCW_MIO_40_IOTYPE": {
            "value": "LVCMOS 3.3V"
          },
          "PCW_MIO_40_PULLUP": {
            "value": "enabled"
          },
          "PCW_MIO_40_SLEW": {
            "value": "slow"
          },
          "PCW_MIO_41_IOTYPE": {
            "value": "LVCMOS 3.3V"
          },
          "PCW_MIO_41_PULLUP": {
            "value": "enabled"
          },
          "PCW_MIO_41_SLEW": {
            "value": "slow"
          },
          "PCW_MIO_42_IOTYPE": {
            "value": "LVCMOS 3.3V"
          },
          "PCW_MIO_42_PULLUP": {
            "value": "enabled"
          },
          "PCW_MIO_42_SLEW": {
            "value": "slow"
          },
          "PCW_MIO_43_IOTYPE": {
            "value": "LVCMOS 3.3V"
          },
          "PCW_MIO_43_PULLUP": {
            "value": "enabled"
          },
          "PCW_MIO_43_SLEW": {
            "value": "slow"
          },
          "PCW_MIO_44_IOTYPE": {
            "value": "LVCMOS 3.3V"
          },
          "PCW_MIO_44_PULLUP": {
            "value": "enabled"
          },
          "PCW_MIO_44_SLEW": {
            "value": "slow"
          },
          "PCW_MIO_45_IOTYPE": {
            "value": "LVCMOS 3.3V"
          },
          "PCW_MIO_45_PULLUP": {
            "value": "enabled"
          },
          "PCW_MIO_45_SLEW": {
            "value": "slow"
          },
          "PCW_MIO_46_IOTYPE": {
            "value": "LVCMOS 3.3V"
          },
          "PCW_MIO_46_PULLUP": {
            "value": "enabled"
          },
          "PCW_MIO_46_SLEW": {
            "value": "slow"
          },
          "PCW_MIO_47_IOTYPE": {
            "value": "LVCMOS 3.3V"
          },
          "PCW_MIO_47_PULLUP": {
            "value": "enabled"
          },
          "PCW_MIO_47_SLEW": {
            "value": "slow"
          },
          "PCW_MIO_48_IOTYPE": {
            "value": "LVCMOS 3.3V"
          },
          "PCW_MIO_48_PULLUP": {
            "value": "enabled"
          },
          "PCW_MIO_48_SLEW": {
            "value": "slow"
          },
          "PCW_MIO_49_IOTYPE": {
            "value": "LVCMOS 3.3V"
          },
          "PCW_MIO_49_PULLUP": {
            "value": "enabled"
          },
          "PCW_MIO_49_SLEW": {
            "value": "slow"
          },
          "PCW_MIO_4_IOTYPE": {
            "value": "LVCMOS 3.3V"
          },
          "PCW_MIO_4_SLEW": {
            "value": "slow"
          },
          "PCW_MIO_50_IOTYPE": {
            "value": "LVCMOS 3.3V"
          },
          "PCW_MIO_50_PULLUP": {
            "value": "enabled"
          },
          "PCW_MIO_50_SLEW": {
            "value": "slow"
          },
          "PCW_MIO_51_IOTYPE": {
            "value": "LVCMOS 3.3V"
          },
          "PCW_MIO_51_PULLUP": {
            "value": "enabled"
          },
          "PCW_MIO_51_SLEW": {
            "value": "slow"
          },
          "PCW_MIO_52_IOTYPE": {
            "value": "LVCMOS 3.3V"
          },
          "PCW_MIO_52_PULLUP": {
            "value": "enabled"
          },
          "PCW_MIO_52_SLEW": {
            "value": "slow"
          },
          "PCW_MIO_53_IOTYPE": {
            "value": "LVCMOS 3.3V"
          },
          "PCW_MIO_53_PULLUP": {
            "value": "enabled"
          },
          "PCW_MIO_53_SLEW": {
            "value": "slow"
          },
          "PCW_MIO_5_IOTYPE": {
            "value": "LVCMOS 3.3V"
          },
          "PCW_MIO_5_SLEW": {
            "value": "slow"
          },
          "PCW_MIO_6_IOTYPE": {
            "value": "LVCMOS 3.3V"
          },
          "PCW_MIO_6_SLEW": {
            "value": "slow"
          },
          "PCW_MIO_7_IOTYPE": {
            "value": "LVCMOS 3.3V"
          },
          "PCW_MIO_7_SLEW": {
            "value": "slow"
          },
          "PCW_MIO_8_IOTYPE": {
            "value": "LVCMOS 3.3V"
          },
          "PCW_MIO_8_SLEW": {
            "value": "slow"
          },
          "PCW_MIO_9_IOTYPE": {
            "value": "LVCMOS 3.3V"
          },
          "PCW_MIO_9_PULLUP": {
            "value": "enabled"
          },
          "PCW_MIO_9_SLEW": {
            "value": "slow"
          },
          "PCW_MIO_TREE_PERIPHERALS": {
            "value": "GPIO#Quad SPI Flash#Quad SPI Flash#Quad SPI Flash#Quad SPI Flash#Quad SPI Flash#Quad SPI Flash#GPIO#Quad SPI Flash#GPIO#SPI 1#SPI 1#SPI 1#SPI 1#UART 0#UART 0#GPIO#GPIO#GPIO#GPIO#GPIO#GPIO#GPIO#GPIO#GPIO#GPIO#GPIO#GPIO#USB 0#USB 0#USB 0#USB 0#USB 0#USB 0#USB 0#USB 0#USB 0#USB 0#USB 0#USB 0#SD 0#SD 0#SD 0#SD 0#SD 0#SD 0#USB Reset#SD 0#GPIO#GPIO#GPIO#GPIO#GPIO#GPIO"
          },
          "PCW_MIO_TREE_SIGNALS": {
            "value": "gpio[0]#qspi0_ss_b#qspi0_io[0]#qspi0_io[1]#qspi0_io[2]#qspi0_io[3]/HOLD_B#qspi0_sclk#gpio[7]#qspi_fbclk#gpio[9]#mosi#miso#sclk#ss[0]#rx#tx#gpio[16]#gpio[17]#gpio[18]#gpio[19]#gpio[20]#gpio[21]#gpio[22]#gpio[23]#gpio[24]#gpio[25]#gpio[26]#gpio[27]#data[4]#dir#stp#nxt#data[0]#data[1]#data[2]#data[3]#clk#data[5]#data[6]#data[7]#clk#cmd#data[0]#data[1]#data[2]#data[3]#reset#cd#gpio[48]#gpio[49]#gpio[50]#gpio[51]#gpio[52]#gpio[53]"
          },
          "PCW_QSPI_GRP_FBCLK_ENABLE": {
            "value": "1"
          },
          "PCW_QSPI_GRP_FBCLK_IO": {
            "value": "MIO 8"
          },
          "PCW_QSPI_GRP_IO1_ENABLE": {
            "value": "0"
          },
          "PCW_QSPI_GRP_SINGLE_SS_ENABLE": {
            "value": "1"
          },
          "PCW_QSPI_GRP_SINGLE_SS_IO": {
            "value": "MIO 1 .. 6"
          },
          "PCW_QSPI_GRP_SS1_ENABLE": {
            "value": "0"
          },
          "PCW_QSPI_PERIPHERAL_ENABLE": {
            "value": "1"
          },
          "PCW_QSPI_PERIPHERAL_FREQMHZ": {
            "value": "200"
          },
          "PCW_QSPI_QSPI_IO": {
            "value": "MIO 1 .. 6"
          },
          "PCW_SD0_GRP_CD_ENABLE": {
            "value": "1"
          },
          "PCW_SD0_GRP_CD_IO": {
            "value": "MIO 47"
          },
          "PCW_SD0_GRP_POW_ENABLE": {
            "value": "0"
          },
          "PCW_SD0_GRP_WP_ENABLE": {
            "value": "0"
          },
          "PCW_SD0_PERIPHERAL_ENABLE": {
            "value": "1"
          },
          "PCW_SD0_SD0_IO": {
            "value": "MIO 40 .. 45"
          },
          "PCW_SDIO_PERIPHERAL_FREQMHZ": {
            "value": "100"
          },
          "PCW_SDIO_PERIPHERAL_VALID": {
            "value": "1"
          },
          "PCW_SINGLE_QSPI_DATA_MODE": {
            "value": "x4"
          },
          "PCW_SPI1_GRP_SS1_ENABLE": {
            "value": "0"
          },
          "PCW_SPI1_GRP_SS2_ENABLE": {
            "value": "0"
          },
          "PCW_SPI1_PERIPHERAL_ENABLE": {
            "value": "1"
          },
          "PCW_SPI1_SPI1_IO": {
            "value": "MIO 10 .. 15"
          },
          "PCW_SPI_PERIPHERAL_FREQMHZ": {
            "value": "166.666666"
          },
          "PCW_SPI_PERIPHERAL_VALID": {
            "value": "1"
          },
          "PCW_UART0_GRP_FULL_ENABLE": {
            "value": "0"
          },
          "PCW_UART0_PERIPHERAL_ENABLE": {
            "value": "1"
          },
          "PCW_UART0_UART0_IO": {
            "value": "MIO 14 .. 15"
          },
          "PCW_UART1_PERIPHERAL_ENABLE": {
            "value": "0"
          },
          "PCW_UART_PERIPHERAL_FREQMHZ": {
            "value": "100"
          },
          "PCW_UART_PERIPHERAL_VALID": {
            "value": "1"
          },
          "PCW_UIPARAM_ACT_DDR_FREQ_MHZ": {
            "value": "533.333374"
          },
          "PCW_UIPARAM_DDR_BANK_ADDR_COUNT": {
            "value": "3"
          },
          "PCW_UIPARAM_DDR_BL": {
            "value": "8"
          },
          "PCW_UIPARAM_DDR_BUS_WIDTH": {
            "value": "16 Bit"
          },
          "PCW_UIPARAM_DDR_CL": {
            "value": "7"
          },
          "PCW_UIPARAM_DDR_COL_ADDR_COUNT": {
            "value": "10"
          },
          "PCW_UIPARAM_DDR_CWL": {
            "value": "6.000000"
          },
          "PCW_UIPARAM_DDR_DEVICE_CAPACITY": {
            "value": "4096 MBits"
          },
          "PCW_UIPARAM_DDR_DRAM_WIDTH": {
            "value": "16 Bits"
          },
          "PCW_UIPARAM_DDR_ECC": {
            "value": "Disabled"
          },
          "PCW_UIPARAM_DDR_MEMORY_TYPE": {
            "value": "DDR 3 (Low Voltage)"
          },
          "PCW_UIPARAM_DDR_PARTNO": {
            "value": "Custom"
          },
          "PCW_UIPARAM_DDR_ROW_ADDR_COUNT": {
            "value": "15"
          },
          "PCW_UIPARAM_DDR_SPEED_BIN": {
            "value": "DDR3_1600K"
          },
          "PCW_UIPARAM_DDR_T_FAW": {
            "value": "40"
          },
          "PCW_UIPARAM_DDR_T_RAS_MIN": {
            "value": "35.0"
          },
          "PCW_UIPARAM_DDR_T_RC": {
            "value": "48.75"
          },
          "PCW_UIPARAM_DDR_T_RCD": {
            "value": "13.75"
          },
          "PCW_UIPARAM_DDR_T_RP": {
            "value": "13.75"
          },
          "PCW_USB0_PERIPHERAL_ENABLE": {
            "value": "1"
          },
          "PCW_USB0_RESET_ENABLE": {
            "value": "1"
          },
          "PCW_USB0_RESET_IO": {
            "value": "MIO 46"
          },
          "PCW_USB0_USB0_IO": {
            "value": "MIO 28 .. 39"
          },
          "PCW_USB_RESET_ENABLE": {
            "value": "1"
          },
          "PCW_USB_RESET_SELECT": {
            "value": "Share reset pin"
          }
        },
        "interface_ports": {
          "M_AXI_GP0": {
            "vlnv": "xilinx.com:interface:aximm_rtl:1.0",
            "mode": "Master",
            "address_space_ref": "Data",
            "base_address": {
              "minimum": "0x40000000",
              "maximum": "0x7FFFFFFF",
              "width": "32"
            }
          }
        },
        "addressing": {
          "address_spaces": {
            "Data": {
              "range": "4G",
              "width": "32",
              "local_memory_map": {
                "name": "Data",
                "description": "Address Space Segments",
                "address_blocks": {
                  "segment1": {
                    "name": "segment1",
                    "display_name": "segment1",
                    "base_address": "0x00000000",
                    "range": "256K",
                    "width": "18",
                    "usage": "register"
                  },
                  "segment2": {
                    "name": "segment2",
                    "display_name": "segment2",
                    "base_address": "0x00040000",
                    "range": "256K",
                    "width": "19",
                    "usage": "register"
                  },
                  "segment3": {
                    "name": "segment3",
                    "display_name": "segment3",
                    "base_address": "0x00080000",
                    "range": "512K",
                    "width": "20",
                    "usage": "register"
                  },
                  "segment4": {
                    "name": "segment4",
                    "display_name": "segment4",
                    "base_address": "0x00100000",
                    "range": "1023M",
                    "width": "30",
                    "usage": "register"
                  },
                  "M_AXI_GP0": {
                    "name": "M_AXI_GP0",
                    "display_name": "M_AXI_GP0",
                    "base_address": "0x40000000",
                    "range": "1G",
                    "width": "31",
                    "usage": "register"
                  },
                  "M_AXI_GP1": {
                    "name": "M_AXI_GP1",
                    "display_name": "M_AXI_GP1",
                    "base_address": "0x80000000",
                    "range": "1G",
                    "width": "32",
                    "usage": "register"
                  },
                  "IO_Peripheral_Registers": {
                    "name": "IO_Peripheral_Registers",
                    "display_name": "IO Peripheral Registers",
                    "base_address": "0xE0000000",
                    "range": "3M",
                    "width": "32",
                    "usage": "register"
                  },
                  "SMC_Memories": {
                    "name": "SMC_Memories",
                    "display_name": "SMC Memories",
                    "base_address": "0xE1000000",
                    "range": "80M",
                    "width": "32",
                    "usage": "register"
                  },
                  "SLCR_Registers": {
                    "name": "SLCR_Registers",
                    "display_name": "SLCR Registers",
                    "base_address": "0xF8000000",
                    "range": "3K",
                    "width": "32",
                    "usage": "register"
                  },
                  "PS_System_Registers": {
                    "name": "PS_System_Registers",
                    "display_name": "PS System Registers",
                    "base_address": "0xF8001000",
                    "range": "8252K",
                    "width": "32",
                    "usage": "register"
                  },
                  "CPU_Private_Registers": {
                    "name": "CPU_Private_Registers",
                    "display_name": "CPU Private Registers",
                    "base_address": "0xF8900000",
                    "range": "6156K",
                    "width": "32",
                    "usage": "register"
                  },
                  "segment5": {
                    "name": "segment5",
                    "display_name": "segment5",
                    "base_address": "0xFC000000",
                    "range": "32M",
                    "width": "32",
                    "usage": "register"
                  },
                  "segment6": {
                    "name": "segment6",
                    "display_name": "segment6",
                    "base_address": "0xFFFC0000",
                    "range": "256K",
                    "width": "32",
                    "usage": "register"
                  }
                }
              }
            }
          }
        }
      },
      "ps7_0_axi_periph": {
        "vlnv": "xilinx.com:ip:axi_interconnect:2.1",
        "xci_path": "ip/pwm_controller_ps7_0_axi_periph_0/pwm_controller_ps7_0_axi_periph_0.xci",
        "inst_hier_path": "ps7_0_axi_periph",
        "xci_name": "pwm_controller_ps7_0_axi_periph_0",
        "parameters": {
          "NUM_MI": {
            "value": "1"
          }
        },
        "interface_ports": {
          "S00_AXI": {
            "mode": "Slave",
            "vlnv_bus_definition": "xilinx.com:interface:aximm:1.0",
            "vlnv": "xilinx.com:interface:aximm_rtl:1.0"
          },
          "M00_AXI": {
            "mode": "Master",
            "vlnv_bus_definition": "xilinx.com:interface:aximm:1.0",
            "vlnv": "xilinx.com:interface:aximm_rtl:1.0"
          }
        },
        "ports": {
          "ACLK": {
            "type": "clk",
            "direction": "I",
            "parameters": {
              "ASSOCIATED_RESET": {
                "value": "ARESETN"
              }
            }
          },
          "ARESETN": {
            "type": "rst",
            "direction": "I"
          },
          "S00_ACLK": {
            "type": "clk",
            "direction": "I",
            "parameters": {
              "ASSOCIATED_BUSIF": {
                "value": "S00_AXI"
              },
              "ASSOCIATED_RESET": {
                "value": "S00_ARESETN"
              }
            }
          },
          "S00_ARESETN": {
            "type": "rst",
            "direction": "I"
          },
          "M00_ACLK": {
            "type": "clk",
            "direction": "I",
            "parameters": {
              "ASSOCIATED_BUSIF": {
                "value": "M00_AXI"
              },
              "ASSOCIATED_RESET": {
                "value": "M00_ARESETN"
              }
            }
          },
          "M00_ARESETN": {
            "type": "rst",
            "direction": "I"
          }
        },
        "components": {
          "s00_couplers": {
            "interface_ports": {
              "M_AXI": {
                "mode": "Master",
                "vlnv_bus_definition": "xilinx.com:interface:aximm:1.0",
                "vlnv": "xilinx.com:interface:aximm_rtl:1.0"
              },
              "S_AXI": {
                "mode": "Slave",
                "vlnv_bus_definition": "xilinx.com:interface:aximm:1.0",
                "vlnv": "xilinx.com:interface:aximm_rtl:1.0"
              }
            },
            "ports": {
              "M_ACLK": {
                "type": "clk",
                "direction": "I",
                "parameters": {
                  "ASSOCIATED_BUSIF": {
                    "value": "M_AXI"
                  },
                  "ASSOCIATED_RESET": {
                    "value": "M_ARESETN"
                  }
                }
              },
              "M_ARESETN": {
                "type": "rst",
                "direction": "I"
              },
              "S_ACLK": {
                "type": "clk",
                "direction": "I",
                "parameters": {
                  "ASSOCIATED_BUSIF": {
                    "value": "S_AXI"
                  },
                  "ASSOCIATED_RESET": {
                    "value": "S_ARESETN"
                  }
                }
              },
              "S_ARESETN": {
                "type": "rst",
                "direction": "I"
              }
            },
            "components": {
              "auto_pc": {
                "vlnv": "xilinx.com:ip:axi_protocol_converter:2.1",
                "xci_name": "pwm_controller_auto_pc_0",
                "xci_path": "ip/pwm_controller_auto_pc_0/pwm_controller_auto_pc_0.xci",
                "inst_hier_path": "ps7_0_axi_periph/s00_couplers/auto_pc",
                "parameters": {
                  "MI_PROTOCOL": {
                    "value": "AXI4LITE"
                  },
                  "SI_PROTOCOL": {
                    "value": "AXI3"
                  }
                },
                "interface_ports": {
                  "S_AXI": {
                    "vlnv": "xilinx.com:interface:aximm_rtl:1.0",
                    "mode": "Slave",
                    "bridges": [
                      "M_AXI"
                    ]
                  }
                }
              }
            },
            "interface_nets": {
              "auto_pc_to_s00_couplers": {
                "interface_ports": [
                  "M_AXI",
                  "auto_pc/M_AXI"
                ]
              },
              "s00_couplers_to_auto_pc": {
                "interface_ports": [
                  "S_AXI",
                  "auto_pc/S_AXI"
                ]
              }
            },
            "nets": {
              "S_ACLK_1": {
                "ports": [
                  "S_ACLK",
                  "auto_pc/aclk"
                ]
              },
              "S_ARESETN_1": {
                "ports": [
                  "S_ARESETN",
                  "auto_pc/aresetn"
                ]
              }
            }
          }
        },
        "interface_nets": {
          "ps7_0_axi_periph_to_s00_couplers": {
            "interface_ports": [
              "S00_AXI",
              "s00_couplers/S_AXI"
            ]
          },
          "s00_couplers_to_ps7_0_axi_periph": {
            "interface_ports": [
              "M00_AXI",
              "s00_couplers/M_AXI"
            ]
          }
        },
        "nets": {
          "S00_ACLK_1": {
            "ports": [
              "S00_ACLK",
              "s00_couplers/S_ACLK"
            ]
          },
          "S00_ARESETN_1": {
            "ports": [
              "S00_ARESETN",
              "s00_couplers/S_ARESETN"
            ]
          },
          "ps7_0_axi_periph_ACLK_net": {
            "ports": [
              "M00_ACLK",
              "s00_couplers/M_ACLK"
            ]
          },
          "ps7_0_axi_periph_ARESETN_net": {
            "ports": [
              "M00_ARESETN",
              "s00_couplers/M_ARESETN"
            ]
          }
        }
      },
      "rst_ps7_0_50M": {
        "vlnv": "xilinx.com:ip:proc_sys_reset:5.0",
        "xci_name": "pwm_controller_rst_ps7_0_50M_0",
        "xci_path": "ip/pwm_controller_rst_ps7_0_50M_0/pwm_controller_rst_ps7_0_50M_0.xci",
        "inst_hier_path": "rst_ps7_0_50M"
      },
      "rgb_pwm_block_0": {
        "vlnv": "user.org:user:rgb_pwm_block:1.0",
        "xci_name": "pwm_controller_rgb_pwm_block_0_0",
        "xci_path": "ip/pwm_controller_rgb_pwm_block_0_0/pwm_controller_rgb_pwm_block_0_0.xci",
        "inst_hier_path": "rgb_pwm_block_0"
      }
    },
    "interface_nets": {
      "processing_system7_0_DDR": {
        "interface_ports": [
          "DDR",
          "processing_system7_0/DDR"
        ]
      },
      "processing_system7_0_FIXED_IO": {
        "interface_ports": [
          "FIXED_IO",
          "processing_system7_0/FIXED_IO"
        ]
      },
      "processing_system7_0_M_AXI_GP0": {
        "interface_ports": [
          "processing_system7_0/M_AXI_GP0",
          "ps7_0_axi_periph/S00_AXI"
        ]
      },
      "ps7_0_axi_periph_M00_AXI": {
        "interface_ports": [
          "ps7_0_axi_periph/M00_AXI",
          "rgb_pwm_block_0/s_axi"
        ]
      }
    },
    "nets": {
      "processing_system7_0_FCLK_CLK0": {
        "ports": [
          "processing_system7_0/FCLK_CLK0",
          "processing_system7_0/M_AXI_GP0_ACLK",
          "ps7_0_axi_periph/S00_ACLK",
          "rst_ps7_0_50M/slowest_sync_clk",
          "ps7_0_axi_periph/M00_ACLK",
          "ps7_0_axi_periph/ACLK",
          "rgb_pwm_block_0/s_axi_aclk"
        ]
      },
      "processing_system7_0_FCLK_RESET0_N": {
        "ports": [
          "processing_system7_0/FCLK_RESET0_N",
          "rst_ps7_0_50M/ext_reset_in"
        ]
      },
      "rgb_pwm_block_0_RGB_led": {
        "ports": [
          "rgb_pwm_block_0/RGB_led",
          "RGB_led_A"
        ]
      },
      "rst_ps7_0_50M_peripheral_aresetn": {
        "ports": [
          "rst_ps7_0_50M/peripheral_aresetn",
          "ps7_0_axi_periph/S00_ARESETN",
          "ps7_0_axi_periph/M00_ARESETN",
          "ps7_0_axi_periph/ARESETN",
          "rgb_pwm_block_0/s_axi_aresetn"
        ]
      }
    },
    "addressing": {
      "/processing_system7_0": {
        "address_spaces": {
          "Data": {
            "segments": {
              "SEG_rgb_pwm_block_0_reg_base": {
                "address_block": "/rgb_pwm_block_0/s_axi_mem/reg_base",
                "offset": "0x43C00000",
                "range": "64K"
              }
            }
          }
        }
      }
    }
  }
}