generated from maddiebusig/vivado-template-hog
Modify RGB PWM IP to use enable pulser instead of clock divider
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8ffe9271f2
commit
631f46f339
@ -399,10 +399,6 @@
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end
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end
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// Add user logic here
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// Add user logic here
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wire led_en;
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assign led_en = slv_reg1[0];
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assign led = led_en ? slv_reg0[7:0] : 0;
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wire rst = ~S_AXI_ARESETN;
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wire rst = ~S_AXI_ARESETN;
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wire [15:0] duty_R = slv_reg0[15:0];
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wire [15:0] duty_R = slv_reg0[15:0];
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@ -413,17 +409,18 @@
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wire [3:0] pwm_clk_mod = slv_reg3[11:8];
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wire [3:0] pwm_clk_mod = slv_reg3[11:8];
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wire pwm_oen = slv_reg3[0];
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wire pwm_oen = slv_reg3[0];
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wire pwm_clk;
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wire pwm_clk_en;
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conf_div clk_div (
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clk_enable_pulser clkdiv_pulser (
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.clk_in(S_AXI_ACLK),
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.clk(S_AXI_ACLK),
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.rst(S_AXI_ARESETN),
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.rst(rst),
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.sel(pwm_clk_mod),
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.sel(pwm_clk_mod),
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.clk_out(pwm_clk)
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.en_out(pwm_clk_en)
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);
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);
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pwm_core core_R(
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pwm_core core_R(
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.clk(pwm_clk),
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.clk(pwm_clk),
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.en(pwm_clk_en),
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.rst(rst),
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.rst(rst),
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.duty(duty_R),
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.duty(duty_R),
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.window_width(window_width),
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.window_width(window_width),
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@ -433,6 +430,7 @@
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pwm_core core_G(
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pwm_core core_G(
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.clk(pwm_clk),
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.clk(pwm_clk),
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.en(pwm_clk_en),
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.rst(rst),
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.rst(rst),
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.duty(duty_G),
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.duty(duty_G),
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.window_width(window_width),
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.window_width(window_width),
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@ -442,6 +440,7 @@
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pwm_core core_B(
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pwm_core core_B(
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.clk(pwm_clk),
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.clk(pwm_clk),
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.en(pwm_clk_en),
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.rst(rst),
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.rst(rst),
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.duty(duty_B),
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.duty(duty_B),
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.window_width(window_width),
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.window_width(window_width),
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