Implement PWM core testbench

pwm_block/sim/pwm_core_tb.v

@@ -1,8 +1,72 @@
 `timescale 1ns/1ps
 
-module pwm_core_tb;
+module pwm_core_tb #(
+	VCD_DUMPFILE = ""
+);
+
+reg clk = 0;
+reg rst = 1;
+reg [15:0] duty;
+reg [15:0] window_width;
+reg oen = 1;
+
+wire pulse;
+
+pwm_core#(
+	.WINDOW_REG_SIZE(16)
+) cut (
+	.clk(clk),
+	.rst(rst),
+	.duty(duty),
+	.window_width(window_width),
+	.oen(oen),
+	.pulse(pulse)
+);
+
+integer k;
+
+initial begin
+	rst = 1;
+	clk = 0;
+
+	#10
+
+	rst = 0;
+	oen = 1;
+	duty = 3;
+	window_width = 7;
+
+	for (k=0; k<13; k=k+1) begin
+		#5 clk = 1;
+		#5 clk = 0;
+	end
+
+	duty = 1;
+
+	for (k=0; k<13; k=k+1) begin
+		#5 clk = 1;
+		#5 clk = 0;
+	end
+
+	duty = 1;
+	window_width = 2;
+
+	for (k=0; k<8; k=k+1) begin
+		#5 clk = 1;
+		#5 clk = 0;
+	end
+
+	oen = 0;
+
+	for (k=0; k<5; k=k+1) begin
+		#5 clk = 1;
+		#5 clk = 0;
+	end
 
 
+	$dumpvars;
+	$finish;
+end
 
 endmodule